傳感器和通信中的CMOS級聯式Sigma

所属分类:網絡與通信  
出版时间:2007-8   出版时间:科學出版社有限責任公司   作者:麥迪瑞   页数:299  

内容概要

  CMOS級聯式Sigma-Delta調節器是近年來研究的熱點,作為一種較新的結構形式,國內外都比較重視。尤其是對于ADC的研究,作為數模混合CMOS電路的研究典型,在國內非常熱。《傳感器和通信中的CMOS級聯式Sigma-Delta調制器(影印版)》對sigma-delta調制器作了全面的分析,深入探討了其在傳感器接口和無線通信中的應用。對誤差分析、級連結構、電路、模型,以及實際設計重點考慮的內容,都進行了全面的闡述。《傳感器和通信中的CMOS級聯式Sigma-Delta調制器(影印版)》與其他同類書不同之處在于其完整、深入地對開關電容電路的誤差進行了詳細分析。  《傳感器和通信中的CMOS級聯式Sigma-Delta調制器(影印版)》內容全面、由淺入深、適用面廣、適合相關專業的高級科技工作者和研究生參考,對高年級本科生也具有參考價值。

书籍目录

PrefaceList of AbbreviationsCHAPTER 1 Σ△ ADCs: Principles, Architectures, and State of the Art1.1. Analog-to-Digital Conversion: Fundamentals1.1.1. Sampling1.1.2. Quantization1.2. Oversampling Σ△ ADCs: Fundamentals1.2.1. Oversampling1.2.2. Noise-shaping1.2.3. Basic architecture of oversampling ZA ADCs1.2.4. Performance metrics1.2.5. Ideal performance1.3. Single-Loop Σ△ Architectures1.3.1. 1st-order Σ△ modulator1.3.2. 2nd-order Σ△ modulator1.3.3. High-order Σ△ modulatorsStability concernsOptimized NTFsHigh-order topologiesNon-linear stabilization techniques1.4. Cascade Σ△ Architectures1.5. Multi-Bit Σ△ ArchitecturesInfluence of DAC errors1.5.1. Element trimming and analog calibration1.5.2. Digital correction1.5.3. Dynamic element matching1.5.4. Dual-quantizationLeslie-Singh architectureSingle-loop Σ△MsCascade Σ△Ms1.6. Parallel Σ△ Architectures1.6.1. Frequency division multiplexing1.6.2. Time division multiplexing1.6.3. Code division multiplexing1.7. State of the Art in Σ△ ADCs1.8. SummaryCHAPTER 2 Non-ldeal Performance of Σ△ Modulators2.1. Integrator LeakageLeaky integrator2.1.1. Single-loop Σ△ modulators1st-order loop2nd-order loopLth-order loops2.1.2. Cascade Σ△ modulators2.2. Capacitor Mismatch2.2.1. Single-loop Σ△ modulators2nd-order loopLth-order loops2.2.2. Cascade Σ△ modulators2.3. Integrator Settling Error2.3.1. Model for the transient response of SC integratorsSC integrator modelTransient during integrationTransient during samplingIntegration-sampling process2.3.2, Validation of the proposed modelComparison with experimental resultsComparison with traditional models2.3.3. Effect of the amplifier finite gain-bandwidth productSingle-loop Σ△ modulatorsCascade Σ△ modulators2.3.4. Effect of the amplifier finite slew rate2.3.5. Effect of the switch finite on-resistanceEffect on an ideal integratorEffect on the amplifier GBEffect on the amplifier SR2.4. Circuit Noise2.4.1. Noise in track-and-holdsTrack component……CHAPTER 3 A Wideband ZA Modulator in 3.3-V 0.35-um CMOSCHAPTER 4 AΣ△Modulator in 2.5-V 0.25-um CMOS for ADSUADSL+CHAPTER 5 AΣ△Modulator with Programmable Signal Gain for Automotive Sensor Inte~acesAPPENDIX A An Expandible Family of CascadeΣ△ModulatorsAPPENDIX B Power Estimator for CascadeΣ△ModulatorsREFERENCESIndex

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